1. Field of the Invention
The present invention relates to thin film transistor devices and methods for producing thereof. More particularly, the present invention relates to a thin film transistor device and a method for producing thereof suitable for a transistor using a poly-crystalline silicon (poly-Si).
Thin film transistor devices are utilized mainly for an image display device of a liquid crystal display device (LCD), a plasma display device (PDP) and the like as pixels or thin film transistors (TFT) for driving a peripheral circuit.
High-temperature poly-crystalline Si has been used for a base thin film employed for forming conventional thin film transistors. Poly-crystalline Si (poly Si) thin film is formed on a quartz substrate (i.e., an insulator substrate) by a high-temperature heat treatment at a temperature below or above 900xc2x0 C., and the poly-crystalline Si of comparatively large grain size (for example, 500-600 nm) is formed.
A TFT formed on the high-temperature polycrystalline Si (hereinafter, referred to as high-temperature poly-Si) thin film utilizes a Si thin film having a low density in a grain boundary of the crystal and excellent crystallinity, as a channel, so that a field effect mobility can be obtained of 100-150 cm2/Vs, as a value close to conventional type Si-LSi on a Si substrate having xcx9c500 cm2/Vs. See S. M. Sze, Physics of Semiconductor Devices, p. 29, Second Edition, Wiley.
However, high-temperature poly-Si uses expensive quartz substrate as the insulator substrate so as to withstand a high temperature process. Since this cost of the substrate has been the main cause of difficulty in cost reduction of the entire semiconductor device, the use of such a TFT has been restricted.
In recent years, rather than the high-temperature poly-Si, research has vigorously been carried out on low-temperature poly-crystalline Si (hereinafter, referred to as low-temperature poly-Si). This poly-crystalline Si crystallized amorphous Si is formed on a low cost glass substrate or a plastic substrate by a plasma CVD method or the like utilizing a zone melting re-crystallization method such as excimer laser annealing. Since the poly-crystalline Si thin film is capable of being formed at low-temperature (xcx9c150xc2x0 C.), there is an advantage that a remarkably inexpensive TFT can be formed.
However, the low-temperature poly-Si up to now is small (xcx9c100 nm) in crystal grain size compared with the high-temperature poly-Si. Only poly-crystalline Si with large (xcx9c50 nm) surface roughness has been formed.
When crystal grain size is small, there are drawbacks such that a density in the grain boundary of crystal existing in a current path becomes large, and current mobility is lowered through current scattering in the grain boundary thereof.
Further, when the surface roughness is large, a requirement for thickening (xcx9c1100 nm) a gate insulation film to that amount is generated in order to restrain a gate leakage current. Consequently, since the carrier number induced to the channel by the same gate voltage becomes small, the current mobility is also lowered.
From that reason, in a TFT of a product base utilizing conventional low-temperature poly-Si as an elemental material, the field effect mobility thereof is restrained to a degree of up to 150 cm2/Vs in case of an electron carrier, and is restrained to a degree of up to 50 cm2/Vs in case of positive hole carrier. With a small mobility like this, since elemental performance cannot reach the required elemental performance, there is a drawback that elements capable of being formed on the same glass (or plastic) substrate are restricted.
For example, in the case of the image display device, a pixel circuit part which is comparatively low in required performance, can be formed on glass (or plastic). Other circuits which are higher in the required performances such as a source driver, a gate driver, a shift register, and a peripheral controller, since they cannot be formed on the same substrate, are integrated on a printed circuit board as semi-conductor chips utilizing a conventional Si-LSI art. This printed circuit board is connected with the glass substrate.
With such a method, there have been drawbacks such that in addition to small dimensioning (4 in.-10 in.) in screen size depending upon a dimension where the periphery circuit part is mounted, a remarkable increase in cost occurs for the entire image display device. Further, in a power saving image display device, which is promising for a future market, a TFT is indispensable to conduct CMOS (complementary MOS) forming. For that purpose, the requirement for a further increase in performance with respect to the field effect mobility of a positive hole carrier is estimated.
In order to improve these drawbacks, enhancement in performance of a TFT into high level is necessitated by realizing such a polycrystalline thin film and that current scattering in the grain boundary is restrained, and the surface roughness thereof is lessened. In order to high-function the low-temperature poly-Si, various arts have been proposed as exemplified hereinafter.
Among them, for example, an art (for example, Japanese Unexamined Patent Publication H7-321339) is provided for forming poly-crystalline Si having an [111] axis in a current moving direction, by introducing a metal element for selectively promoting an amorphous Si film formed on the insulator substrate into crystallization and by carrying out respective crystal growth in a direction parallel to a substrate. Further, an art (for example, Japanese Unexamined Patent Publication H10-41234) is provided for forming rectangular poly-crystalline Si having a  less than 100 greater than  axis in a direction perpendicular to the substrate, and a {220} surface in parallel (or at an angle of 45xc2x0) to a beam scanning direction by accurately controlling a shape of a laser beam for annealing and a scanning rate of a laser annealing position; and an art (for example, Japanese Unexamined Patent Publication H8-55808) is provided for forming columnar polycrystalline Si layers trued up of a crystal orientation by forming a first polycrystalline Si layer on the substrate, by forming a seed crystal having either of typical orientations ({100}, {110}, and {111}) by anisotropic etching and by forming a second poly-crystalline Si layer thereon and the like.
However, in spite of these numerous trials, a TFT with sufficiently high mobility has not been realized so far.
The conventional crystallization methods of low-temperature poly-Si thin films are not sufficiently complete. For example, when either of the maximum grain size, or the surface roughness is taken up, performance of a TFT has not, as yet, met the demand required for a peripheral circuit integrated type liquid crystal display panel. So, these arts cannot sufficiently replace an existing thin film transistor device of low function. Accordingly, it is important to realize an image display device having high performance and a large area with low cost.
Thus, a first object of the present invention is to provide a thin film transistor device being excellent in characteristics in which conventional arts cannot provide by restraining current scattering in the grain boundary of crystal, by decreasing the surface roughness, and by realizing a poly-crystalline thin film having a crystal structure so as to realize high mobility even for a positive carrier. A second object is to provide a production method by which a thin film transistor device can be easily obtained. A third object is to provide an image display device utilizing the thin film transistor device.
In order to achieve the objects described above and as a result of various experiments and investigations about low-temperature poly-Si for forming a TFT, the inventors have realized a TFT with high mobility by introducing Ge into a poly-Si thin film, by differentiating (for further details, a ratio of Ge composition in a grain boundary of crystal is made larger than a portion where a ratio of Ge composition in an interior grain is the minimum) a ratio of Ge composition between a crystal interior grain and the grain boundary by a phase separation involved in crystallization, by restraining a current scattering factor in a grain boundary, and by restraining surface roughness utilizing a difference of volumes of a crystal.
The present invention has been carried out based on this knowledge. The first object can be achieved by a thin film transistor device including an insulator substrate, a poly-crystalline thin film formed on the insulator substrate, and a transistor composed of a source, a drain, a channel, and a gate, formed on the poly-crystalline thin film. The poly-crystalline thin film in a channel part of the transistor is composed of a silicon germanium poly-crystal Si1xe2x88x92xGex having a Ge concentration x of 0 less than x less than 1, and a Ge concentration x in the poly-crystalline thin film is larger in a grain boundary than a portion where a Ge concentration in an interior grain of crystal becomes the minimum.
Further, preferably, a thickness of the polycrystalline thin film is 10-100 nm, a Ge concentration x in a central part of a crystal grain constituting the poly-crystalline thin film is 0 less than xxe2x89xa60.3, a Ge concentration x in a grain boundary is 0.1 less than xxe2x89xa61.0 where the Ge concentration x described above is invariably larger in a grain boundary than a portion where a Ge concentration in an interior grain becomes the minimum.
Further preferable characteristics of a thin film transistor device will be described hereinafter.
In the thin film transistor device, a poly-crystalline Si1xe2x88x92xGex thin film is characterized in that a surface roughness in a grain boundary is equal to or less than 30 nm.
In the thin film transistor device, a main current carried in a channel part of the transistor is characterized as a positive hole.
The thin film transistor device has an insulator substrate, a poly-crystalline thin film formed on the insulator substrate, and a transistor composed of a source, a drain, a channel, and a gate. The poly-crystalline thin film in a channel part of the transistor is characterized by having a {110}-oriented crystal grain in parallel with the substrate and is characterized in that an average lattice constant in a grain boundary is larger than an average lattice constant in an interior grain part of the crystal.
The thin film transistor device is characterized by retaining the insulator substrate, a poly-crystalline Si1xe2x88x92xGex thin film formed on the insulator substrate having a Ge concentration x of 0 less than x less than 1. A circuit part is constituted by integrating a plurality of transistors composed of sources, drains, channels, and gates formed on the poly-crystalline Si1xe2x88x92xGex thin film. The circuit part includes a CMOS type transistor such as both a p type transistor and an n type transistor.
Further, the thin film transistor device is characterized in that a Ge concentration of the p type transistor constituting the circuit part is larger than a Ge concentration of the n type transistor.
The second object is achieved by a method for producing a thin film transistor device characterized by having a step for forming an amorphous Si1xe2x88x92xGex layer of a film thickness of 10-100 nm having a Ge concentration x of 0 less than x less than 1. An annealing step for crystallizing the amorphous Si1xe2x88x92xGex layer is provided by means of an excimer laser having an energy density of 200-300 mJ/cm2 and a pulse number of 1-50 shots.
Further, preferably, in the method for producing a thin film transistor device, the annealing step is characterized by varying an energy density as (180+T)xcx9c(200+T) mJ/cm2 corresponding to a film thickness when the film thickness of the amorphous Si1xe2x88x92xGex layer is set at T nm.
The third object is achieved by an image display device, wherein the image display device has an image display part, an image display circuit controlling a display of the image display part and including at least a data driver, a gate driver, and a buffer amplifier. The image display device may also include a peripheral circuit part positioned in the neighborhood of the image display circuit and controlling the image display circuit. The image display circuit and the peripheral circuit part are integrated on the same substrate as the substrate constituting the image display device. The image display circuit and the peripheral circuit part further retain an insulator substrate, a poly-crystalline Si1xe2x88x92xGex thin film formed on the insulator substrate having a Ge concentration x of 0 less than x less than 1, and a circuit part constituted by integrating a plurality of transistors composed of sources, drains, channels, and gates formed on the poly-crystalline Si1xe2x88x92xGex thin film. The circuit part includes a CMOS type transistor such as either one or both of a p type transistor and/or an n type transistor.
Further, preferably, the image display device is characterized in that Ge concentration x of a p type transistor is larger than a Ge concentration x of an n type transistor.
Furthermore preferably, it is characterized in that the circuit part retains positioning marks provided in the neighborhood of these circuits in order to differentiate the p type transistor, the n type transistor, and the CMOS type transistor.
As explained above, according to the present invention, a high mobility TFT is realized by restraining a current scattering factor in a grain boundary of crystal by introducing Ge into Si and a differential of Ge concentrations between an interior grain and a grain boundary of crystal resulting from a phase separation accompanied with crystallization, and by restraining surface roughness with the use of a difference in volumes of a crystal. As a result, large area (for example, equal to or more than 15 inches) image display devices can be highly integrated since pixel matrices and peripheral circuits are capable of being intensively formed on the same glass substrate.